High Speed Serial Trace Port (HSSTP) Sub-System
High Speed Serial Trace Port (HSSTP) Sub-System

High Speed Serial Trace Port (HSSTP) Sub-System

  • Probe your high speed on-chip signals using high speed HSSTP sub-system.
  • This Trace Port IP provides access at a speed that matches advance cores operational frequencies and enable SOC debugging and problem solving on real time basis- up to 12.5Gbps per Lane.
  • Silicon And Beyond HSSTP is compatible with Xilinx Transceiver and Arura Link Layer standard.
  • Silicon And Beyond HSSTP Sub System was validated across various platforms and debug tools such as GreenHills & Arium.
  • Area and Power efficient implementation that can support up to 6 lanes using one Common Module (PLL+BIOS).
  • Silicon Proven on TSMC 28HPM/HPC; TSMC 55LP; GF 28SLP; GF 40LP; SMIC 40LL

HSSTP Sub-System Block Diagram

HSSTP- Silicon Results at 6.25Gbps