Analog IP Cores
Analog IP Cores

High Speed ADC and DAC

ADC – Analog to Digital Converter

Silabtech is offering ADC designs that cover wide range of Sampling Frequencies and Resolutions. These designs are highly Power and Area efficient for High Frequency RF (OFDM), Industrial, Sensing, SatCom, SDR and Optical Communication applications. Our ADC team is based on highly experience analog designers who are developing ADC and DAC at advance nodes such as 28, 40 and 65nm.

Silabtech Technical team will be able to analyze your specific application requirement and propose the best in class ADC & DAC architecture.

Sample Product #1

12bit – 2 MSPS ADC
Technology: GF 28 SLP, Silicon Proven
  • Segmented cap-DAC based SAR architecture
  • Number of output bits 12
  • Conversion speed 2MSPS (2 Mhz)
  • Support modes for single-ended analog input as well as differential analog input
  • Support One-Shot and Continuous Conversion modes
  • Serial and Parallel digital interfaces to read-out ADC code
  • INL=1.3LSB
  • DNL=0.9LSB

12bit / 2MSPS ADC – Block Diagram:

Sample Product #2

8bit – 3.5 GSPS ADC and DAC
Technology: GF 40 LP, Design Kit Ready
  • This ADC design is based on interleaved SAR architecture (8 levels)
  • At each level the SAR ADC works on 440MHz (440 MSPS)
  • Total Conversion Speed 3.52GHz (3.5 GSPS )
  • Number of output bits 8
  • ENOB 7 bit
  • Input signal voltage – 500mVpp differential.

8bit / 3.5 GSPS ADC – Block Diagram: